/*
 * Copyright (C) 2007 Loren Merritt <lorenm@u.washington.edu>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 */

#define XLSC_CPU_MMX    0x01
#define XLSC_CPU_MMX2   0x02
#define XLSC_CPU_3DNOW  0x04
#define XLSC_CPU_3DNOW2 0x08
#define XLSC_CPU_SSE    0x10
#define XLSC_CPU_SSE2   0x20
#define XLSC_CPU_SSE3   0x40
#define XLSC_CPU_SSSE3  0x80

enum xlsc_pixel_size_e
{
    XLSC_PIXEL_16 = 0,
    XLSC_PIXEL_17 = 1,
};

typedef int (*xlsc_pixel_cmp_t)( uint8_t *fenc, uint8_t *fref, int stride );
typedef void (*xlsc_pixel_cmp_x4_t)( uint8_t *fenc, uint8_t *r0, uint8_t *r1, uint8_t *r2, uint8_t *r3, int stride, int res[4] );

typedef struct
{
    uint32_t cpu;

    /* [inter,intra] */
    void (*sub_dct[2])( int16_t *dct, uint8_t *fenc, uint8_t *fdec );
    void (*add_idct[2])( uint8_t *fdec, int16_t *dct );

    void (*quant)( int16_t *dct, int qp, int bias );
    void (*dequant)( int16_t *dct, int qp );

    void (*copy)( uint8_t *dst, uint8_t *src, int strided, int strides, int height );

    /* mc: [w16,w17][0,h,v,hv]
     * may round width up to a multiple of 8, and height up to a multiple of 2 */
    void (*mc[2][4])( uint8_t *dst, uint8_t *src, int strided, int strides, int height );

    xlsc_pixel_cmp_t sad;
    xlsc_pixel_cmp_t ssd;
    xlsc_pixel_cmp_t satd;
    xlsc_pixel_cmp_x4_t sad_x4;

} xlsc_dsp_t;

uint64_t xlsc_ssd_plane( uint8_t *pix1, uint8_t *pix2, int stride, int width, int height );
void xlsc_dsp_init_asm( xlsc_t *h );
void xlsc_dsp_init( xlsc_t *h );
int xlsc_cpu_num_processors( void );

static inline int mid_pred(int a, int b, int c)
{
#ifdef ARCH_X86
    int i=b;
    asm volatile(
        "cmp    %2, %1 \n\t"
        "cmovg  %1, %0 \n\t"
        "cmovg  %2, %1 \n\t"
        "cmp    %3, %1 \n\t"
        "cmovl  %3, %1 \n\t"
        "cmp    %1, %0 \n\t"
        "cmovg  %1, %0 \n\t"
        :"+&r"(i), "+&r"(a)
        :"r"(b), "r"(c)
    );
    return i;
#else
    if(a>b){
        if(c>b){
            if(c>a) b=a;
            else    b=c;
        }
    }else{
        if(b>c){
            if(c>a) b=c;
            else    b=a;
        }
    }
    return b;
#endif
}
